Key Responsibilities:
- Develop and execute verification plans for mixed signal components, ensuring comprehensive coverage against architectural and microarchitectural specifications.
- Build and maintain test benches and verification environments to validate functionality, timing, and power requirements.
- Create analog behavioral models and system simulation models to identify and resolve bugs during the presilicon phase.
- Replicate, root cause, and debug issues, implementing corrective measures to resolve failures efficiently.
- Collaborate closely with digital and analog architects, RTL developers, and physical design teams to optimize verification flow and achieve design goals.
- Perform technical reviews of test plans and proofs with design and architecture teams to ensure accuracy and completeness.
- Enhance the functional verification infrastructure and methodologies to improve efficiency and reliability.
- Utilize scripting and advanced tools, including AI-based solutions, to streamline verification flow from test plan generation to test triage.
Qualifications:
Minimum Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field and 1+ years of experience in design verification roles, or Master's degree with 0+ years of experience.
- Proficiency in SystemVerilog and Verilog for verification purposes.
- Demonstrated experience in debugging presilicon issues and implementing corrective actions.
- Strong problem-solving skills with the ability to analyze complex design challenges.
- Knowledge of scripting languages such as Python for automating verification processes.
Preferred Qualifications:
- Expertise in OVM and UVM methodologies.
- Experience in test environment development and planning to ensure coverage and reliability.
- Familiarity with objection-oriented programming (OOP) principles in the context of design verification.
- Experience leveraging AI-based tools to enhance verification methodologies.
- Ability to collaborate effectively with cross-functional teams and communicate design insights clearly.
- A proactive mindset, aiming to continuously improve verification infrastructure and methodologies.