In this role of analog design engineer, your responsibilities will include, but not be limited to: - Work with tech lead to resolve power, performance and area design challenges to meet design specification. - Involve in mixed-signal circuits design such as High Speed TX,RX, Equalization circuitry, Clock Alignment, DLL, Clock distribution design, ON-Die VREG/LDO, RCOMP/SCOMP and VREF blocks to meet architectural specifications. - Design and deliver circuit building block schematic, perform pre layout and post layout design optimization to meet design specification across PVT, process variation sensitivity analysis, aging, RV checks for design reliability. - Collateral generations like Circuit Integration Spec, BMOD, timing lib files, ICCT, IBIS, alpha numbers. - Collaborate with custom layout engineer, logic designer, logic verification designer, structural physical design engineers, signal integrity and power deliver engineer to define clear collateral handoff requirements to ensure efficient IP integration. - Perform post silicon data analysis and debug and make necessary design enhancement to meet design specification.
Qualifications
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.