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For over 40 years Intel has been leading and bringing new technology to the marketplace. Now we are building on our historical strength in silicon innovation and global manufacturing capacity to create new products and technologies that help people live happier, more productive lives.

When you work for Intel, you join a company where your career — and your life — can benefit from long-term stability and continual growth. Intel lets you play a role in developing and supporting industry-leading innovations while working with diverse people around the world.

Intel in the United Kingdom offers undergraduates and graduates many chances for growth and learning while working with industry-leading innovation. Of course Intel requires a dedicated team of professionals, not just in Engineering but also across a whole range of disciplines – from Finance to Marketing, Human Resources to Logistics and Sales to Operations and IT.

 

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Factory Quality and Reliability Engineer

Location: canada

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Intel (Canada)

2200 Mission College Blvd
Santa Clara, CA 95054-1549
USA
,CA 95054-1549
CANADA

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Factory Quality and Reliability Engineer

Location:
(MALAYSIA) and various
Job Reference:
6755
Functional Area/Experience:
Engineering / 2 Years
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Job Description & Qualifications

Job Description
Develops, applies, and maintains quality and reliability standards for processing materials into partially finished or finished product. Evaluate the materials, process and techniques used in production to meet the requirement of products and production equipment. Specifies inspection and testing mechanism, conduct quality assessment and perform statistical analysis to determine the responsibility for products and systems that do not meet required specifications. Delivers standardization in product qualification, manufacturing quality systems and methods. Provide feedback to BU, TD and/or partner engineering group on Product Qualification/Certification including manufacturing systems in HVM. Determines reliability requirements and automated screening methodologies of components and systems to achieve company, customer and any governmental agency reliability objectives. Develops new acceleration techniques, analytical tools and quality screens to assure the early identification of potential problems with new products, packaging, processes, and product quality/reliability. Responds to customer requests or events as they occur. Makes recommendations for changes in manufacturing process and system for overall process/product quality control improvement.


Qualifications

Master or Degree in Electronics & Electrical Engineering, Material Engineering or Applied Science

 

 

 

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CPU Physical Design Senior Engineer

Location:
(MALAYSIA) and various
Job Reference:
6754
Functional Area/Experience:
Engineering / 2 Years
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Job Description:

Job Description & Qualifications

Job Description

Creates bottoms-up elements of chip design including but not limited to FET, cell, and block-level custom layouts, FUB-level floor plans, abstract view generation, RC extraction and schematic-to-layout verification and debug using phases of physical design development including parasitic extraction, static timing, wire load models, clock generation, customer polygon editing, auto-place and route algorithms, floor planning, full-chip assembly, packaging, and verification.

Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. Schedules, staffs, executes and verify complex chips development and execution of project methodologies and/or flow developments. Requires expansive knowledge and practical application of methodologies and physical design.

In this role, you will be a part of Intel's CPU Team in Penang which is part of the Intel i3 / i5 / i7/Core X processor development team. The work is performed with broadly defined parameters, and assignments are often complex and nonstandard in nature. Your responsibilities will include but not be limited to:

-Independently assess and drive complex physical design assignments

-Work closely with design engineers to interpret schematics and drive physical implementation.

-Build and verify all levels of physical design hierarchy using in-house tools

-Collaborate closely with other SoC projects at various sites across

Intel Behavioral traits for this position include:

-Adept problem solver with a disciplined approach to problem solving

-Ability to quickly adapt to changing conditions

-Initiative to continually expand your skill set

-Good verbal and written communication skills

-A team player willing to share knowledge

-A self-starter proactively seeking solutions

-Flexible and able to multi-task


Qualifications
 

You must meeting either one of the criteria possess to be initially considered for this position:
-MS in Electrical Engineering and/or Computer Engineering with 2+ years of experience in VLSI. OR
-BS in Electrical Engineering and/or Computer Engineering 4+ years of experience in VLSI AND
-Hands-on expertise and strong fundamentals in the following areas:
1) Very Large Scale Integration VLSI.
2) Well versed in UNIX*, programming skills in C/C++ or Perl/TCL and relevant Computer Aided Design CAD tools

 

 

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CPU-SoC Silicon Design Graduate Trainee

Location:
(MALAYSIA) and various
Job Reference:
6753
Functional Area/Experience:
Engineering / 1 Year
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Job Description:

Job Description & Qualifications

Job Description

Job Description: In this position, you will be involving in the training, design and development of next generation SOC/CPU for wide range of Intel products ranging from Client PC , smartphone, tablet to wearable. Your responsibilities will include some of the following but not limited to: - Assist design unit owner in Register Transfer Level RTL model functional validation. Use CAD tool extensively to simulate logic behavior and circuit performance and direction of physical design for next generation, deep sub-micron embedded circuit solutions. Verify the circuit behavior against the original simulation model and first silicon. - Define VLSI Structural Design methodology and developing design flows. Implement structural physical designs, such as synthesis, floor planning, power-grid and clock tree designs, timing budgeting and closure, place and route, RC-extraction and integration. Verify structural physical designs, such as functional equivalency, timing/performance, noise, layout design rules, reliability and power. - Develop Analog IP on next generation deep submicron process for the Intel's SOC, perform tasks related to Very-large-scale integration VLSI complementary metal-oxide-semiconductor CMOS IC design, Solid state physics and physical layout. Such tasks may include: Circuit design of high speed clocking related circuits [phase-locked loop PLL, delay-locked loop DLL, bandgap] or high voltage input/output IO [double data rate DDR/LPDDR, General-purpose input/output GPIO, OPIO]. - Responsible for Integration of Third party IPs -- Synthesis, functional and/or timing convergence, and pre and post-si debug of IPs developed by various external vendors as well as within the company. Handling of signals crossing power planes and clock domains, industry standard protocols including hardware and software details dealing with Memory LPDDR, storage eMMC, SATA, UFS, peripherals PCIe, USB, and MIPI interfaces in SOC devices. System integration dealing with Si/ Platform/ FW/ MW/ drivers/ OS/ Apps on Android Windows-based tablets and phones.


Qualifications
 

You must possess a Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering. Additional qualifications include: - Familiarity with Very Large Scale Integration VLSI Complementary Metal-Oxide Semiconductor CMOS logic circuit design - Well versed in UNIX*, C programming and relevant Computer Aided Design CAD tools